One common step that may be performed frequently during fabrication of modern semiconductor devices is the formation of a film, such as a silicon oxide film, on a semiconductor substrate. Silicon oxide is widely used as an insulating film in the manufacture of semiconductor devices and, as is well known, may be deposited as a film by a thermal chemical vapor deposition (“CVD”) process or by a plasma-enhanced CVD (“PECVD”) process. In conventional thermal CVD processes, reactive gases are supplied to the substrate surface, where heat-induced chemical reactions take place to form the desired film. In a conventional plasma process, a controlled plasma is formed to decompose and/or energize reactive species to produce the desired film.
Semiconductor-device geometries have decreased significantly in size since such devices were originally developed several decades ago. This decrease in device-geometry size has consequently resulted in an increase of circuit elements and interconnections formed in integrated circuits fabricated on semiconductor substrates. One persistent challenge faced by semiconductor manufacturers in the design and fabrication of such densely packed integrated circuits is the prevention of spurious interactions between circuit elements.
Unwanted interactions are typically prevented by providing spaces, sometimes referred to in the art as “gaps” or “trenches,” between adjacent elements, and filling the spaces with electrically insulative material. This arrangement acts to isolate the elements both physically and electrically. Such spaces may be used in a variety of different applications, including shallow-trench-isolation (“STI”), premetal-dielectric (“PMD”), or intermetal-dielectric (“IMD”) applications, among others. As circuit densities increase with reduced feature sizes, the widths of these spaces decrease, increasing their aspect ratios, which are defined as respective ratios of a gap's depth to its width. High-aspect-ratio gaps are difficult to fill using conventional CVD methods, causing some integrated-circuit manufacturers to turn to the use high-density-plasma CVD (“HDP-CVD”) techniques. The use of an HDP-CVD technique results in the formation of a plasma that has a density approximately two orders of magnitude greater than the density of a conventional, capacitively coupled plasma. Examples of HDP-CVD systems include inductively coupled plasma (“ICP”) systems and electron-cyclotron-resonance (“ECR”) systems, among others. There are a number of advantages of plasma-deposition processes in gapfill applications that are thus enhanced in the case of HDP-CVD deposition processes. For example, the high reactivity of the species in any plasma deposition process reduces the energy required for a chemical reaction to take place, thereby allowing the temperature of the process to be reduced compared with conventional thermal CVD processes; the temperatures of HDP-CVD processes may advantageously be even lower than with PECVD processes because the species reactivity is even higher. Similarly, HDP-CVD systems generally operate at lower pressure ranges than low-density plasma systems. The low chamber pressure provides active species having a long mean-free-path and reduced angular distribution. These factors contribute to a significant number of constituents from the plasma reaching even the deepest portions of closely spaced gaps, providing a film with improved gapfill capabilities.
Another factor that allows films deposited by HDP-CVD techniques to have improved gapfill characteristics is the occurrence of sputtering, promoted by the plasma's high density, simultaneous with film deposition. The sputtering component of HDP deposition slows deposition on certain features, such as the corners of raised surfaces, thereby contributing to the increased gapfill ability of HDP deposited films. Some HDP-CVD processes introduce an inert element that further promotes the sputtering effect, with the choice of inert element often depending on its atomic or molecular weight, a parameter that is generally correlated with the size of the sputtering effect. In addition, the sputtering effect may be further promoted by applying an electric bias with an electrode in the substrate support pedestal to use electrical attraction of the plasma species.
It was initially thought that the simultaneous deposition and etching provided by HDP-CVD processes would allow gaps to be filled in almost any application. Semiconductor manufacturers have discovered, however, that there is a practical limit to the aspect ratio of gaps that HDP-CVD deposition techniques are able to fill. The challenge of filling gaps with HDP-CVD is illustrated schematically with the cross-sectional views shown in FIGS. 1A and 1B. FIG. 1A shows a vertical cross section of a substrate 110, such as may be provided with a semiconductor wafer, having a film of features 120. Adjacent features 120 define gaps 114 that are to be filled with dielectric material, with the sidewalls 116 of the gaps being defined by the surfaces of the features 120. As the deposition proceeds, dielectric material 118 accumulates on the surfaces of the features 120, as well as on the substrate 110, and forms overhangs 122 at the corners 124 of the features 120. As deposition of the dielectric material 118 continues, the overhangs 122 typically grow faster than the gap 114 in a characteristic breadloafing fashion. Eventually, the overhangs 122 grow together to form the dielectric film 126 shown in FIG. 1B, preventing deposition into an interior void 128.
In an increasingly common process, an HDP-CVD process is used to deposit a silicon oxide film using a process gas that includes monosilane SiH4, molecular oxygen O2, and argon Ar. It has been reported that when such a process is used to fill certain narrow-width, high-aspect-ratio gaps, the sputtering caused by argon in the process gas hampers the gapfill effects. Specifically, it has been reported that material sputtered by argon in the process redeposits on the upper portions of the sidewalls of the gaps being filled at a rate faster than at the lower portions. This, in turn, has resulted in the formation of a void in the gap as illustrated in FIG. 1B. There accordingly remains a need in the art for techniques that allow improved gapfill with HDP-CVD processes.